1. Field of the Invention
The invention relates to a method of fabricating an integrated circuit, and more particularly to a method of fabricating a dynamic random access memory (DRAM) capacitor.
2. Description of the Related Art
FIG. 1 is a memory cell of a DRAM device including a transfer transistor T and a storage capacitor C. The source region of the transfer transistor T is coupled to a corresponding bit line BL, the drain region is coupled to a storage capacitor 100 of the storage capacitor C and the gate electrode is coupled to a corresponding word line WL. An opposite electrode 102 of the storage capacitor C is coupled to a fixed voltage. A dielectric layer 104 is situated between the storage electrode 100 and the opposite electrode 102.
A schematic, cross-sectional view of a conventional DRAM capacitor is shown in FIG. 2. Isolation structures and word lines (not shown) are formed on a substrate 200 and word lines are isolated with the bit lines 204 by dielectric layers 202a, 202b formed on the substrate 200. A node contact window 205 is formed within the dielectric layer 202a, 202b and a polysilicon layer is deposited in the node contact window 205. The polysilicon layer is then patterned by photolithography to form a lower electrode 206 of a capacitor.
Since the design rule for semiconductors is reduced, the width for exposure and alignment of the node contact window 205 becomes narrower. The width of the node contact window 205 is also restricted by the resolution of the exposure light source, so that it is necessary to reduce the size of the node contact window 205.
A selective HSG-Si 208 is always deposited on the lower electrode 206 to increase the surface area of the lower electrode 206. In order to form the selective HSG-Si, an amorphous silicon layer needs to be formed as a substitute for the polysilicon layer 206 and to serve as the lower electrode of the capacitor. But the deposition rate of the amorphous silicon layer is slower than that of the polysilicon layer, such that the throughput of the product is reduced and the demands for product competition can not be satisfied.